This is a toy OpenRISC simulation I made. It has a (hypothetical) 20MHz processor, 32MB RAM, serial console, and should boot Linux in the demo above. The CPU simulation has:

• Support for 61 instruction types (the minimum required for my Linux & BusyBox binaries)
• 32 general purpose registers
• Separate instruction and data MMUs, both with the default 64 sets, 1 way arrangement
• Exception handling
• Delay slot support
• Programmable Interrupt Controller
• Tick timer

To speak to the outside world, the system has a tiny 16650A serial UART simulation, the minimum to work with 8250_core. If you see messages about "too much work in IRQ handler", that's a known bug :-).

The kernel is a v3.13-rc7, built from Jonas Bonn's linux tree. I built a minimum feature BusyBox 1.22.1 to reduce the download time of the above demo. The combined kernel and BusyBox total 2.7MB.

The simulation is written in C++, and so actually looked like this during development. The above demo is thanks to the emscripten LLVM-to-JavaScript compiler. The JavaScript terminal is the awesome term.js.

https://github.com/skip2/simctty